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    Scarmoge posted an update 6 years, 11 months ago

    Hmmmmmm.
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    entire article at https://www.the-scientist.com/features/building-a-silicon-brain-65738

    Building a Silicon Brain
    Computer chips based on biological neurons may help simulate larger and more-complex brain models.

    May 1, 2019
    SANDEEP RAVINDRAN

    SMART CHIP: A neuromorphic chip designed by the Heidelberg group of physicist Karlheinz Meier. The chip features 384 artificial neurons connected by 100,000 synapses, and operates approximately 100,000 times faster than the speed at which the brain computes.
    © HEIDELBERG UNIVERSITY

    In 2012, computer scientist Dharmendra Modha used a powerful supercomputer to simulate the activity of more than 500 billion neurons—more, even, than the 85 billion or so neurons in the human brain. It was the culmination of almost a decade of work, as Modha progressed from simulating the brains of rodents and cats to something on the scale of humans.

    The simulation consumed enormous computational resources—1.5 million processors and 1.5 petabytes (1.5 million gigabytes) of memory—and was still agonizingly slow, 1,500 times slower than the brain computes. Modha estimates that to run it in biological real time would have required 12 gigawatts of energy, about six times the maximum output capacity of the Hoover Dam. “And yet, it was just a cartoon of what the brain does,” says Modha, chief scientist for brain-inspired computing at IBM Almaden Research Center in northern California. The simulation came nowhere close to replicating the functionality of the human brain, which uses about the same amount of power as a 20-watt lightbulb.

    …

    References

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    D.S. Modha, R. Singh, “Network architecture of the long-distance pathways in the macaque brain,” PNAS, 107:13485–90, 2010.
    P.A. Merolla et al. “A million spiking-neuron integrated circuit with a scalable communication network and interface,” Science, 345:668–73, 2014.
    M. Davies et al. “Loihi: A neuromorphic manycore processor with on-chip learning,” IEEE Micro, 38:82–99, 2018.
    J. Schemmel et al., “A wafer-scale neuromorphic hardware system for large-scale neural modeling,” Proc 2010 IEEE Int Symp Circ Sys, 2010.
    S.B. Furber et al., “The SpiNNaker Project,” Proc IEEE, 102:652–65, 2014.